Define analog and digital quantities. Subtract 1010101.101 − 1000100.001 using both 1's complement and 2's complement methods.
📌 Topic cluster: Subtraction using 1's / 2's complement
Exam Prep
TU BCA CACS 103/105 — 2019 through 2025. Every question solved, every mark earned.
Total Questions
70
Solved
70 / 70
Coverage
100%
Repeated Topics
22
Years Covered
2019–2025
Exam Format
Group B
6 questions × 5 marks = 30
Group C
2 questions × 10 marks = 20
Define analog and digital quantities. Subtract 1010101.101 − 1000100.001 using both 1's complement and 2's complement methods.
📌 Topic cluster: Subtraction using 1's / 2's complement
Convert (2594.68)₁₀ into hexadecimal. Design a full subtractor with its block diagram, truth table, logic diagram and Boolean expression.
What NAND and NOR gates are called universal gates? Express the Boolean function F(A,B,C,D) = D(A'+B) + B'D into standard SOP and POS forms.
📌 Topic cluster: 4-variable K-map minimization
Design a combinational circuit that generates the 9's complement of a 3-bit number using only 3 gates. Also design a 1:8 DEMUX using 1:4 DEMUX and 1:2 DEMUX.
Define state table. Design a combinational circuit using a ROM that accepts a 3-bit number and generates the square of the input as output.
Design a MOD-11 synchronous counter.
📌 Topic cluster: MOD-N counter design
How does a flip-flop differ from a latch? Explain a clocked SR flip-flop with its logic diagram, truth table, characteristic table and excitation table.
📌 Topic cluster: Clocked SR flip-flop with tables
Differentiate between PAL and PLA. Design a combinational circuit with four inputs representing a BCD decimal digit and four outputs that generate the 2's complement of the input binary pattern. Include circuit diagram, truth table and block diagram.
📌 Topic cluster: PAL vs PLA / programmable logic
Define multiplexer. Explain 4:1 MUX with its block diagram, truth table and logic diagram. Implement an 8:1 multiplexer using lower-order multiplexers.
📌 Topic cluster: Decoder design / Boolean function with decoder
Explain how the race condition in a JK flip-flop can be resolved. Design a 3-bit Gray code synchronous counter.
📌 Topic cluster: JK flip-flop race-around / master-slave